| 10 | | void |
|---|
| 11 | | camera_setup () |
|---|
| 12 | | { |
|---|
| 13 | | REG (PCB_PINSEL0) = |
|---|
| 14 | | (REG (PCB_PINSEL0) & 0xFFFF0000) | UART0_PCB_PINSEL_CFG | |
|---|
| 15 | | UART1_PCB_PINSEL_CFG ; //| 0x50; |
|---|
| 16 | | REG (GPIO_IODIR) = DEFAULT_PORT_DIR; |
|---|
| 17 | | //REG(GPIO_IOSET)=CAM_BUF_ENABLE; |
|---|
| 18 | | //REG (GPIO_IOCLR) = CAM_BUF_ENABLE; // Change for AL440B |
|---|
| 19 | | REG (GPIO_IOCLR) = BUF_RESET; |
|---|
| 20 | | camera_reset (); |
|---|
| 21 | | fifo_reset (); |
|---|
| 22 | | |
|---|
| 23 | | camera_type = OV6620; |
|---|
| 24 | | } |
|---|
| 25 | | |
|---|
| 26 | | void |
|---|
| 27 | | camera_reset () |
|---|
| 28 | | { |
|---|
| 29 | | // Reset the Camera |
|---|
| 30 | | REG (GPIO_IOCLR) = CAM_RESET; |
|---|
| 31 | | delay (); |
|---|
| 32 | | REG (GPIO_IOSET) = CAM_RESET; |
|---|
| 33 | | delay (); |
|---|
| 34 | | REG (GPIO_IOCLR) = CAM_RESET; |
|---|
| 35 | | delay (); |
|---|
| 36 | | |
|---|
| 37 | | } |
|---|
| 38 | | |
|---|
| 39 | | int |
|---|
| 40 | | camera_set_reg (int reg, int val) |
|---|
| 41 | | { |
|---|
| 42 | | unsigned int data[3]; |
|---|
| 43 | | int to; |
|---|
| 44 | | data[0] = camera_type; |
|---|
| 45 | | data[1] = reg; |
|---|
| 46 | | data[2] = val; |
|---|
| 47 | | to = 0; |
|---|
| 48 | | while (i2c_send (3, data)) |
|---|
| 49 | | { |
|---|
| 50 | | to++; |
|---|
| 51 | | if (to > 3) |
|---|
| 52 | | return 0; |
|---|
| 53 | | } |
|---|
| 54 | | delay_us_4 (1); |
|---|
| 55 | | return 1; |
|---|
| 56 | | } |
|---|
| 57 | | |
|---|
| 58 | | void |
|---|
| 59 | | image_send_direct (int size_x, int size_y) |
|---|
| 60 | | { |
|---|
| 61 | | int x, y; |
|---|
| 62 | | fifo_load_frame (); |
|---|
| 63 | | |
|---|
| 64 | | putc (1); |
|---|
| 65 | | putc (size_x); |
|---|
| 66 | | putc (size_y); |
|---|
| 67 | | for (y = 0; y < size_y; y++) |
|---|
| 68 | | { |
|---|
| 69 | | putc (2); |
|---|
| 70 | | for (x = 0; x < size_x; x++) |
|---|
| 71 | | { |
|---|
| 72 | | fifo_read_pixel (); |
|---|
| 73 | | putc (red_pixel); |
|---|
| 74 | | putc (green_pixel); |
|---|
| 75 | | putc (blue_pixel); |
|---|
| 76 | | } |
|---|
| 77 | | } |
|---|
| 78 | | putc (3); |
|---|
| 79 | | } |
|---|
| 80 | | |
|---|
| 81 | | void |
|---|
| 82 | | image_fifo_to_mem (unsigned char *img, int size_x, int size_y) |
|---|
| 83 | | { |
|---|
| 84 | | int x, y; |
|---|
| 85 | | |
|---|
| 86 | | for (y = 0; y < size_y; y++) |
|---|
| 87 | | { |
|---|
| 88 | | for (x = 0; x < size_x; x++) |
|---|
| 89 | | { |
|---|
| 90 | | int index; |
|---|
| 91 | | fifo_read_pixel (); |
|---|
| 92 | | index = (size_x * y * 3) + (x * 3); |
|---|
| 93 | | img[index] = red_pixel; |
|---|
| 94 | | img[index + 1] = green_pixel; |
|---|
| 95 | | img[index + 2] = blue_pixel; |
|---|
| 96 | | } |
|---|
| 97 | | } |
|---|
| 98 | | |
|---|
| 99 | | } |
|---|
| 100 | | |
|---|
| 101 | | void |
|---|
| 102 | | image_send_uart (unsigned char *img, int size_x, int size_y) |
|---|
| 103 | | { |
|---|
| 104 | | int y, x; |
|---|
| 105 | | |
|---|
| 106 | | putc (1); // start of frame |
|---|
| 107 | | for (y = 0; y < size_y; y++) |
|---|
| 108 | | { |
|---|
| 109 | | putc (2); // indicates a new row |
|---|
| 110 | | for (x = 0; x < size_x; x++) |
|---|
| 111 | | { |
|---|
| 112 | | int index; |
|---|
| 113 | | index = (size_x * y * 3) + (x * 3); |
|---|
| 114 | | putc (img[index]); // Sends Red value |
|---|
| 115 | | putc (img[index + 1]); // Sends Green Value |
|---|
| 116 | | putc (img[index + 2]); // Sends Blue Value |
|---|
| 117 | | } |
|---|
| 118 | | } |
|---|
| 119 | | putc (3); // end of frame |
|---|
| 120 | | |
|---|
| 121 | | } |
|---|
| 122 | | |
|---|
| 123 | | void |
|---|
| 124 | | InitialiseI2C (void) |
|---|
| 125 | | { |
|---|
| 126 | | |
|---|
| 127 | | REG (I2C_I2CONCLR) = 0xFF; |
|---|
| 128 | | |
|---|
| 129 | | // Set pinouts as scl and sda |
|---|
| 130 | | REG (PCB_PINSEL0) = 0x50; |
|---|
| 131 | | |
|---|
| 132 | | REG (I2C_I2CONSET) = 0x40; //I2C master |
|---|
| 133 | | |
|---|
| 134 | | REG (I2C_I2CONSET) = 0x64; |
|---|
| 135 | | |
|---|
| 136 | | REG (I2C_I2DAT) = 0x42; |
|---|
| 137 | | |
|---|
| 138 | | REG (I2C_I2CONCLR) = 0x08; |
|---|
| 139 | | |
|---|
| 140 | | REG (I2C_I2CONCLR) = 0x20; |
|---|
| 141 | | } |
|---|
| 142 | | |
|---|
| 143 | | void |
|---|
| 144 | | delay (void) |
|---|
| 145 | | { |
|---|
| 146 | | int x; |
|---|
| 147 | | for (x = 0; x < 10000; x++); |
|---|
| 148 | | } |
|---|
| 149 | | |
|---|
| 150 | | /*void FRAME_READ_INC() |
|---|
| 151 | | { |
|---|
| 152 | | //while(REG(GPIO_IOPIN)&0x8000); |
|---|
| 153 | | REG(GPIO_IOSET)=0x800; |
|---|
| 154 | | REG(GPIO_IOCLR)=0x800; |
|---|
| 155 | | }*/ |
|---|
| 156 | | |
|---|
| 157 | | |
|---|
| 158 | | |
|---|
| 159 | | void |
|---|
| 160 | | fifo_load_frame () |
|---|
| 161 | | { |
|---|
| 162 | | |
|---|
| 163 | | unsigned int x, i; |
|---|
| 164 | | //REG(GPIO_IOCLR)=CAM_IE; |
|---|
| 165 | | //while(frame_done!=1); |
|---|
| 166 | | fifo_read_reset (); |
|---|
| 167 | | fifo_write_reset (); |
|---|
| 168 | | while (!(REG (GPIO_IOPIN) & CAM_VSYNC)); //while(CAM_VSYNC); |
|---|
| 169 | | while (REG (GPIO_IOPIN) & CAM_VSYNC); //while(!CAM_VSYNC); |
|---|
| 170 | | |
|---|
| 171 | | REG (GPIO_IOSET) = BUF_WEE; |
|---|
| 172 | | |
|---|
| 173 | | // wait for vsync to finish |
|---|
| 174 | | while (!(REG (GPIO_IOPIN) & CAM_VSYNC)); //while(CAM_VSYNC); |
|---|
| 175 | | |
|---|
| 176 | | enable_ext_interrupt (); |
|---|
| 177 | | |
|---|
| 178 | | for (i = 0; i < 3; i++) |
|---|
| 179 | | { |
|---|
| 180 | | while (!(REG (GPIO_IOPIN) & CAM_HREF)); |
|---|
| 181 | | while (REG (GPIO_IOPIN) & CAM_HREF); |
|---|
| 182 | | } |
|---|
| 183 | | |
|---|
| 184 | | putc('E'); |
|---|
| 185 | | // delay(); |
|---|
| 186 | | //REG(GPIO_IOCLR)=BUF_WEE; //BUF_WEE=0 |
|---|
| 187 | | } |
|---|
| 188 | | |
|---|
| 189 | | void |
|---|
| 190 | | fifo_reset () |
|---|
| 191 | | { |
|---|
| 192 | | REG (GPIO_IOCLR) = BUF_RESET; |
|---|
| 193 | | delay_us_4 (1); |
|---|
| 194 | | REG (GPIO_IOSET) = BUF_RESET; |
|---|
| 195 | | |
|---|
| 196 | | REG (GPIO_IOCLR) = BUF_WEE; |
|---|
| 197 | | REG (GPIO_IOCLR) = BUF_WRST; |
|---|
| 198 | | REG (GPIO_IOCLR) = BUF_RRST; |
|---|
| 199 | | REG (GPIO_IOCLR) = BUF_RCK; |
|---|
| 200 | | REG (GPIO_IOSET) = BUF_RCK; |
|---|
| 201 | | REG (GPIO_IOCLR) = BUF_RCK; |
|---|
| 202 | | delay_us_4 (1); |
|---|
| 203 | | REG (GPIO_IOSET) = BUF_WRST; |
|---|
| 204 | | REG (GPIO_IOSET) = BUF_RRST; |
|---|
| 205 | | |
|---|
| 206 | | } |
|---|
| 207 | | |
|---|
| 208 | | void |
|---|
| 209 | | fifo_write_reset () |
|---|
| 210 | | { |
|---|
| 211 | | REG (GPIO_IOCLR) = BUF_WEE; |
|---|
| 212 | | REG (GPIO_IOCLR) = BUF_WRST; |
|---|
| 213 | | |
|---|
| 214 | | delay_us_4 (1); |
|---|
| 215 | | |
|---|
| 216 | | REG (GPIO_IOSET) = BUF_WRST; |
|---|
| 217 | | } |
|---|
| 218 | | |
|---|
| 219 | | void |
|---|
| 220 | | fifo_read_reset () |
|---|
| 221 | | { |
|---|
| 222 | | REG (GPIO_IOCLR) = BUF_RRST; |
|---|
| 223 | | REG (GPIO_IOCLR) = BUF_RCK; |
|---|
| 224 | | REG (GPIO_IOSET) = BUF_RCK; |
|---|
| 225 | | REG (GPIO_IOCLR) = BUF_RCK; |
|---|
| 226 | | REG (GPIO_IOSET) = BUF_RRST; |
|---|
| 227 | | } |
|---|
| 228 | | |
|---|
| 229 | | |
|---|
| 230 | | void |
|---|
| 231 | | fifo_read_pixel () |
|---|
| 232 | | { |
|---|
| 233 | | //if(hiresMode && !frame_dump) frame_skip_pixel(); |
|---|
| 234 | | green_pixel = REG (GPIO_IOPIN); |
|---|
| 235 | | FIFO_READ_INC (); |
|---|
| 236 | | red_pixel = REG (GPIO_IOPIN); |
|---|
| 237 | | FIFO_READ_INC (); |
|---|
| 238 | | green_pixel2 = REG (GPIO_IOPIN); |
|---|
| 239 | | FIFO_READ_INC (); |
|---|
| 240 | | blue_pixel = REG (GPIO_IOPIN); |
|---|
| 241 | | FIFO_READ_INC (); |
|---|
| 242 | | |
|---|
| 243 | | red_pixel >>= 24; |
|---|
| 244 | | green_pixel >>= 24; |
|---|
| 245 | | blue_pixel >>= 24; |
|---|
| 246 | | |
|---|
| 247 | | |
|---|
| 248 | | // Help combat bad contacts in the bus? and because if you take them away the compiler breaks |
|---|
| 249 | | // If you remove this, the frame rate goes up on the ov6620 while the ov7620 could have problems |
|---|
| 250 | | /* if(red_pixel<16) red_pixel=16; |
|---|
| 251 | | if(red_pixel>240) red_pixel=240; |
|---|
| 252 | | if(green_pixel<16) green_pixel=16; |
|---|
| 253 | | if(green_pixel>240) green_pixel=240; |
|---|
| 254 | | if(blue_pixel<16) blue_pixel=16; |
|---|
| 255 | | if(blue_pixel>240) blue_pixel=240; |
|---|
| 256 | | */ |
|---|
| 257 | | //if(CAM_VSYNC && !buffer_mode )frame_write_reset(); |
|---|
| 258 | | |
|---|
| 259 | | } |
|---|
| 260 | | |
|---|
| 261 | | void |
|---|
| 262 | | fifo_skip_pixel () |
|---|
| 263 | | { |
|---|
| 264 | | FIFO_READ_INC (); |
|---|
| 265 | | FIFO_READ_INC (); |
|---|
| 266 | | FIFO_READ_INC (); |
|---|
| 267 | | FIFO_READ_INC (); |
|---|
| 268 | | } |
|---|
| 269 | | |
|---|
| 270 | | |
|---|
| 271 | | |
|---|
| 272 | | void |
|---|
| 273 | | delay_i2c () |
|---|
| 274 | | { |
|---|
| 275 | | int x; |
|---|
| 276 | | // make about 4 us |
|---|
| 277 | | for (x = 0; x < 1000; x++); |
|---|
| 278 | | } |
|---|
| 279 | | |
|---|
| 280 | | void |
|---|
| 281 | | delay_us_4 (int cnt) |
|---|
| 282 | | { |
|---|
| 283 | | int i, x; |
|---|
| 284 | | for (i = 0; i < cnt; i++) |
|---|
| 285 | | for (x = 0; x < 10; x++); |
|---|
| 286 | | } |
|---|
| 287 | | |
|---|
| 288 | | void |
|---|
| 289 | | set_cam_ddr_i2c_idle () |
|---|
| 290 | | { |
|---|
| 291 | | //DDR(I2C_PORT,I2C_PORT_DDR_IDLE); |
|---|
| 292 | | REG (GPIO_IODIR) = I2C_PORT_DDR_IDLE; |
|---|
| 293 | | delay_i2c (); |
|---|
| 294 | | |
|---|
| 295 | | } |
|---|
| 296 | | |
|---|
| 297 | | void |
|---|
| 298 | | set_cam_ddr_i2c_write () |
|---|
| 299 | | { |
|---|
| 300 | | //DDR(I2C_PORT,I2C_PORT_DDR_WRITE); |
|---|
| 301 | | REG (GPIO_IODIR) = I2C_PORT_DDR_WRITE; |
|---|
| 302 | | delay_i2c (); |
|---|
| 303 | | } |
|---|
| 304 | | |
|---|
| 305 | | |
|---|
| 306 | | void |
|---|
| 307 | | set_cam_ddr (volatile unsigned long val) |
|---|
| 308 | | { |
|---|
| 309 | | //DDR(I2C_PORT,val); |
|---|
| 310 | | REG (GPIO_IODIR) = val; |
|---|
| 311 | | delay_i2c (); |
|---|
| 312 | | } |
|---|
| 313 | | |
|---|
| 314 | | |
|---|
| 315 | | unsigned int |
|---|
| 316 | | i2c_send (unsigned int num, unsigned int *buffer) |
|---|
| 317 | | { |
|---|
| 318 | | unsigned int ack, i, k; |
|---|
| 319 | | unsigned int data; |
|---|
| 320 | | |
|---|
| 321 | | // Send Start Bit |
|---|
| 322 | | //I2C_SDA=0; // needed because values can be reset by read-modify cycle |
|---|
| 323 | | REG (GPIO_IOCLR) = 0x00800000; |
|---|
| 324 | | set_cam_ddr (I2C_PORT_DDR_READ_SCL); // SDA=0 SCL=1 |
|---|
| 325 | | //I2C_SCL=0; // needed because values can be reset by read-modify cycle |
|---|
| 326 | | REG (GPIO_IOCLR) = 0x00400000; |
|---|
| 327 | | set_cam_ddr_i2c_write (); // SDA=0 SCL=0 |
|---|
| 328 | | |
|---|
| 329 | | // Send the Byte |
|---|
| 330 | | for (k = 0; k != num; k++) |
|---|
| 331 | | { |
|---|
| 332 | | data = buffer[k]; // To avoid shifting array problems |
|---|
| 333 | | for (i = 0; !(i & 8); i++) // Write data |
|---|
| 334 | | { |
|---|
| 335 | | if (data & 0x80) |
|---|
| 336 | | { |
|---|
| 337 | | set_cam_ddr (I2C_PORT_DDR_READ_SDA); // SDA=1 SCL=0 |
|---|
| 338 | | set_cam_ddr_i2c_idle (); // SDA=1 SCL=1 |
|---|
| 339 | | } |
|---|
| 340 | | else |
|---|
| 341 | | { |
|---|
| 342 | | set_cam_ddr_i2c_write (); // SDA=0 SCL=0 |
|---|
| 343 | | set_cam_ddr (I2C_PORT_DDR_READ_SCL); // SDA=0 SCL=1 |
|---|
| 344 | | |
|---|
| 345 | | } |
|---|
| 346 | | while (!(REG (GPIO_IOPIN) & 0x00400000)); |
|---|
| 347 | | //while(!I2C_SCL); |
|---|
| 348 | | |
|---|
| 349 | | |
|---|
| 350 | | if (data & 0x08) |
|---|
| 351 | | { |
|---|
| 352 | | set_cam_ddr (I2C_PORT_DDR_READ_SDA); // SDA=1 SCL=0 |
|---|
| 353 | | |
|---|
| 354 | | } |
|---|
| 355 | | else |
|---|
| 356 | | { |
|---|
| 357 | | set_cam_ddr_i2c_write (); // SDA=0 SCL=0 |
|---|
| 358 | | } |
|---|
| 359 | | |
|---|
| 360 | | data <<= 1; |
|---|
| 361 | | } // END OF 8 BIT FOR LOOP |
|---|
| 362 | | |
|---|
| 363 | | // Check ACK <************************************* |
|---|
| 364 | | set_cam_ddr (I2C_PORT_DDR_READ_SDA); // SDA=1 SCL=0 |
|---|
| 365 | | |
|---|
| 366 | | set_cam_ddr_i2c_idle (); // SDA=1 SCL=1 |
|---|
| 367 | | ack = 0; |
|---|
| 368 | | |
|---|
| 369 | | //if(I2C_SDA) // sample SDA |
|---|
| 370 | | if (REG (GPIO_IOPIN) & 0x00800000) |
|---|
| 371 | | { |
|---|
| 372 | | ack |= 1; |
|---|
| 373 | | break; |
|---|
| 374 | | } |
|---|
| 375 | | |
|---|
| 376 | | set_cam_ddr_i2c_write (); // SDA=0 SCL=0 |
|---|
| 377 | | |
|---|
| 378 | | } |
|---|
| 379 | | |
|---|
| 380 | | // Send Stop Bit |
|---|
| 381 | | set_cam_ddr (I2C_PORT_DDR_READ_SCL); // SDA=0 SCL=1 |
|---|
| 382 | | set_cam_ddr_i2c_idle (); // SDA=1 SCL=1 |
|---|
| 383 | | |
|---|
| 384 | | return ack; |
|---|
| 385 | | |
|---|
| 386 | | } |
|---|
| | 10 | void camera_setup () |
|---|
| | 11 | { |
|---|
| | 12 | REG (PCB_PINSEL0) = (REG (PCB_PINSEL0) & 0xFFFF0000) | UART0_PCB_PINSEL_CFG | UART1_PCB_PINSEL_CFG; // | |
|---|
| | 13 | // 0x50; |
|---|
| | 14 | REG (GPIO_IODIR) = DEFAULT_PORT_DIR; |
|---|
| | 15 | // REG(GPIO_IOSET)=CAM_BUF_ENABLE; |
|---|
| | 16 | // REG (GPIO_IOCLR) = CAM_BUF_ENABLE; // Change for AL440B |
|---|
| | 17 | REG (GPIO_IOCLR) = BUF_RESET; |
|---|
| | 18 | camera_reset (); |
|---|
| | 19 | fifo_reset (); |
|---|
| | 20 | |
|---|
| | 21 | camera_type = OV6620; |
|---|
| | 22 | } |
|---|
| | 23 | |
|---|
| | 24 | void camera_reset () |
|---|
| | 25 | { |
|---|
| | 26 | // Reset the Camera |
|---|
| | 27 | REG (GPIO_IOCLR) = CAM_RESET; |
|---|
| | 28 | delay (); |
|---|
| | 29 | REG (GPIO_IOSET) = CAM_RESET; |
|---|
| | 30 | delay (); |
|---|
| | 31 | REG (GPIO_IOCLR) = CAM_RESET; |
|---|
| | 32 | delay (); |
|---|
| | 33 | |
|---|
| | 34 | } |
|---|
| | 35 | |
|---|
| | 36 | int camera_set_reg (int reg, int val) |
|---|
| | 37 | { |
|---|
| | 38 | unsigned int data[3]; |
|---|
| | 39 | int to; |
|---|
| | 40 | data[0] = camera_type; |
|---|
| | 41 | data[1] = reg; |
|---|
| | 42 | data[2] = val; |
|---|
| | 43 | to = 0; |
|---|
| | 44 | while (i2c_send (3, data)) { |
|---|
| | 45 | to++; |
|---|
| | 46 | if (to > 3) |
|---|
| | 47 | return 0; |
|---|
| | 48 | } |
|---|
| | 49 | delay_us_4 (1); |
|---|
| | 50 | return 1; |
|---|
| | 51 | } |
|---|
| | 52 | |
|---|
| | 53 | void image_send_direct (int size_x, int size_y) |
|---|
| | 54 | { |
|---|
| | 55 | int x, y; |
|---|
| | 56 | fifo_load_frame (); |
|---|
| | 57 | |
|---|
| | 58 | putc (1); |
|---|
| | 59 | putc (size_x); |
|---|
| | 60 | putc (size_y); |
|---|
| | 61 | for (y = 0; y < size_y; y++) { |
|---|
| | 62 | putc (2); |
|---|
| | 63 | for (x = 0; x < size_x; x++) { |
|---|
| | 64 | fifo_read_pixel (); |
|---|
| | 65 | putc (red_pixel); |
|---|
| | 66 | putc (green_pixel); |
|---|
| | 67 | putc (blue_pixel); |
|---|
| | 68 | } |
|---|
| | 69 | } |
|---|
| | 70 | putc (3); |
|---|
| | 71 | } |
|---|
| | 72 | |
|---|
| | 73 | void image_fifo_to_mem (unsigned char *img, int size_x, int size_y) |
|---|
| | 74 | { |
|---|
| | 75 | int x, y; |
|---|
| | 76 | |
|---|
| | 77 | for (y = 0; y < size_y; y++) { |
|---|
| | 78 | for (x = 0; x < size_x; x++) { |
|---|
| | 79 | int index; |
|---|
| | 80 | fifo_read_pixel (); |
|---|
| | 81 | index = (size_x * y * 3) + (x * 3); |
|---|
| | 82 | img[index] = red_pixel; |
|---|
| | 83 | img[index + 1] = green_pixel; |
|---|
| | 84 | img[index + 2] = blue_pixel; |
|---|
| | 85 | } |
|---|
| | 86 | } |
|---|
| | 87 | |
|---|
| | 88 | } |
|---|
| | 89 | |
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| | 90 | void image_send_uart (unsigned char *img, int size_x, int size_y) |
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| | 91 | { |
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| | 92 | int y, x; |
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| | 93 | |
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| | 94 | putc (1); // start of frame |
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| | 95 | for (y = 0; y < size_y; y++) { |
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| | 96 | putc (2); // indicates a new row |
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| | 97 | for (x = 0; x < size_x; x++) { |
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| | 98 | int index; |
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| | 99 | index = (size_x * y * 3) + (x * 3); |
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| | 100 | putc (img[index]); // Sends Red value |
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| | 101 | putc (img[index + 1]); // Sends Green Value |
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| | 102 | putc (img[index + 2]); // Sends Blue Value |
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| | 103 | } |
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| | 104 | } |
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| | 105 | putc (3); // end of frame |
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| | 106 | |
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| | 107 | } |
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| | 108 | |
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| | 109 | void InitialiseI2C (void) |
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| | 110 | { |
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| | 111 | |
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| | 112 | REG (I2C_I2CONCLR) = 0xFF; |
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| | 113 | |
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| | 114 | // Set pinouts as scl and sda |
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| | 115 | REG (PCB_PINSEL0) = 0x50; |
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| | 116 | |
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| | 117 | REG (I2C_I2CONSET) = 0x40; // I2C master |
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| | 118 | |
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| | 119 | REG (I2C_I2CONSET) = 0x64; |
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| | 120 | |
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| | 121 | REG (I2C_I2DAT) = 0x42; |
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| | 122 | |
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| | 123 | REG (I2C_I2CONCLR) = 0x08; |
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| | 124 | |
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| | 125 | REG (I2C_I2CONCLR) = 0x20; |
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| | 126 | } |
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| | 127 | |
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| | 128 | void delay (void) |
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| | 129 | { |
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| | 130 | int x; |
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| | 131 | for (x = 0; x < 10000; x++); |
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| | 132 | } |
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| | 133 | |
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| | 134 | /* |
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| | 135 | * void FRAME_READ_INC() { //while(REG(GPIO_IOPIN)&0x8000); |
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| | 136 | * REG(GPIO_IOSET)=0x800; REG(GPIO_IOCLR)=0x800; } |
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| | 137 | */ |
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| | 138 | |
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| | 139 | |
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| | 140 | |
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| | 141 | void fifo_load_frame () |
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| | 142 | { |
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| | 143 | |
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| | 144 | unsigned int x, i; |
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| | 145 | // REG(GPIO_IOCLR)=CAM_IE; |
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| | 146 | // while(frame_done!=1); |
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| | 147 | fifo_read_reset (); |
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| | 148 | fifo_write_reset (); |
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| | 149 | while (!(REG (GPIO_IOPIN) & CAM_VSYNC)); // while(CAM_VSYNC); |
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| | 150 | while (REG (GPIO_IOPIN) & CAM_VSYNC); // while(!CAM_VSYNC); |
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| | 151 | |
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| | 152 | REG (GPIO_IOSET) = BUF_WEE; |
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| | 153 | |
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| | 154 | // wait for vsync to finish |
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| | 155 | while (!(REG (GPIO_IOPIN) & CAM_VSYNC)); // while(CAM_VSYNC); |
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| | 156 | |
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| | 157 | enable_ext_interrupt (); |
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| | 158 | |
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| | 159 | for (i = 0; i < 3; i++) { |
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| | 160 | while (!(REG (GPIO_IOPIN) & CAM_HREF)); |
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| | 161 | while (REG (GPIO_IOPIN) & CAM_HREF); |
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| | 162 | } |
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| | 163 | |
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| | 164 | putc ('E'); |
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| | 165 | // delay(); |
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| | 166 | // REG(GPIO_IOCLR)=BUF_WEE; //BUF_WEE=0 |
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| | 167 | } |
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| | 168 | |
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| | 169 | void fifo_reset () |
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| | 170 | { |
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| | 171 | REG (GPIO_IOCLR) = BUF_RESET; |
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| | 172 | delay_us_4 (1); |
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| | 173 | REG (GPIO_IOSET) = BUF_RESET; |
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| | 174 | |
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| | 175 | REG (GPIO_IOCLR) = BUF_WEE; |
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| | 176 | REG (GPIO_IOCLR) = BUF_WRST; |
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| | 177 | REG (GPIO_IOCLR) = BUF_RRST; |
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| | 178 | REG (GPIO_IOCLR) = BUF_RCK; |
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| | 179 | REG (GPIO_IOSET) = BUF_RCK; |
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| | 180 | REG (GPIO_IOCLR) = BUF_RCK; |
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| | 181 | delay_us_4 (1); |
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| | 182 | REG (GPIO_IOSET) = BUF_WRST; |
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| | 183 | REG (GPIO_IOSET) = BUF_RRST; |
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| | 184 | |
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| | 185 | } |
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| | 186 | |
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| | 187 | void fifo_write_reset () |
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| | 188 | { |
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| | 189 | REG (GPIO_IOCLR) = BUF_WEE; |
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| | 190 | REG (GPIO_IOCLR) = BUF_WRST; |
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| | 191 | |
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| | 192 | delay_us_4 (1); |
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| | 193 | |
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| | 194 | REG (GPIO_IOSET) = BUF_WRST; |
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| | 195 | } |
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| | 196 | |
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| | 197 | void fifo_read_reset () |
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| | 198 | { |
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| | 199 | REG (GPIO_IOCLR) = BUF_RRST; |
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| | 200 | REG (GPIO_IOCLR) = BUF_RCK; |
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| | 201 | REG (GPIO_IOSET) = BUF_RCK; |
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| | 202 | REG (GPIO_IOCLR) = BUF_RCK; |
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| | 203 | REG (GPIO_IOSET) = BUF_RRST; |
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| | 204 | } |
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| | 205 | |
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| | 206 | |
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| | 207 | void fifo_read_pixel () |
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| | 208 | { |
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| | 209 | // if(hiresMode && !frame_dump) frame_skip_pixel(); |
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| | 210 | green_pixel = REG (GPIO_IOPIN); |
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| | 211 | FIFO_READ_INC (); |
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| | 212 | red_pixel = REG (GPIO_IOPIN); |
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| | 213 | FIFO_READ_INC (); |
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| | 214 | green_pixel2 = REG (GPIO_IOPIN); |
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| | 215 | FIFO_READ_INC (); |
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| | 216 | blue_pixel = REG (GPIO_IOPIN); |
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| | 217 | FIFO_READ_INC (); |
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| | 218 | |
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| | 219 | red_pixel >>= 24; |
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| | 220 | green_pixel >>= 24; |
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| | 221 | blue_pixel >>= 24; |
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| | 222 | |
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| | 223 | |
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| | 224 | // Help combat bad contacts in the bus? and because if you take them |
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| | 225 | // away the compiler breaks |
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| | 226 | // If you remove this, the frame rate goes up on the ov6620 while the |
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| | 227 | // ov7620 could have problems |
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| | 228 | /* |
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| | 229 | * if(red_pixel<16) red_pixel=16; if(red_pixel>240) red_pixel=240; |
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| | 230 | * if(green_pixel<16) green_pixel=16; if(green_pixel>240) |
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| | 231 | * green_pixel=240; if(blue_pixel<16) blue_pixel=16; |
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| | 232 | * if(blue_pixel>240) blue_pixel=240; |
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| | 233 | */ |
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| | 234 | // if(CAM_VSYNC && !buffer_mode )frame_write_reset(); |
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| | 235 | |
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| | 236 | } |
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| | 237 | |
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| | 238 | void fifo_skip_pixel () |
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| | 239 | { |
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| | 240 | FIFO_READ_INC (); |
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| | 241 | FIFO_READ_INC (); |
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| | 242 | FIFO_READ_INC (); |
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| | 243 | FIFO_READ_INC (); |
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| | 244 | } |
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| | 245 | |
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| | 246 | |
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| | 247 | |
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| | 248 | void delay_i2c () |
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| | 249 | { |
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| | 250 | int x; |
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| | 251 | // make about 4 us |
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| | 252 | for (x = 0; x < 1000; x++); |
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| | 253 | } |
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| | 254 | |
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| | 255 | void delay_us_4 (int cnt) |
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| | 256 | { |
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| | 257 | int i, x; |
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| | 258 | for (i = 0; i < cnt; i++) |
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| | 259 | for (x = 0; x < 10; x++); |
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| | 260 | } |
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| | 261 | |
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| | 262 | void set_cam_ddr_i2c_idle () |
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| | 263 | { |
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| | 264 | // DDR(I2C_PORT,I2C_PORT_DDR_IDLE); |
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| | 265 | REG (GPIO_IODIR) = I2C_PORT_DDR_IDLE; |
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| | 266 | delay_i2c (); |
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| | 267 | |
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| | 268 | } |
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| | 269 | |
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| | 270 | void set_cam_ddr_i2c_write () |
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| | 271 | { |
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| | 272 | // DDR(I2C_PORT,I2C_PORT_DDR_WRITE); |
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| | 273 | REG (GPIO_IODIR) = I2C_PORT_DDR_WRITE; |
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| | 274 | delay_i2c (); |
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| | 275 | } |
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| | 276 | |
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| | 277 | |
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| | 278 | void set_cam_ddr (volatile unsigned long val) |
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| | 279 | { |
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| | 280 | // DDR(I2C_PORT,val); |
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| | 281 | REG (GPIO_IODIR) = val; |
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| | 282 | delay_i2c (); |
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| | 283 | } |
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| | 284 | |
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| | 285 | |
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| | 286 | unsigned int i2c_send (unsigned int num, unsigned int *buffer) |
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| | 287 | { |
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| | 288 | unsigned int ack, i, k; |
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| | 289 | unsigned int data; |
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| | 290 | |
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| | 291 | // Send Start Bit |
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| | 292 | // I2C_SDA=0; // needed because values can be reset by read-modify |
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| | 293 | // cycle |
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| | 294 | REG (GPIO_IOCLR) = 0x00800000; |
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| | 295 | set_cam_ddr (I2C_PORT_DDR_READ_SCL); // SDA=0 SCL=1 |
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| | 296 | // I2C_SCL=0; // needed because values can be reset by read-modify |
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| | 297 | // cycle |
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| | 298 | REG (GPIO_IOCLR) = 0x00400000; |
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| | 299 | set_cam_ddr_i2c_write (); // SDA=0 SCL=0 |
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| | 300 | |
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| | 301 | // Send the Byte |
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| | 302 | for (k = 0; k != num; k++) { |
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| | 303 | data = buffer[k]; // To avoid shifting array problems |
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| | 304 | for (i = 0; !(i & 8); i++) // Write data |
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| | 305 | { |
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| | 306 | if (data & 0x80) { |
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| | 307 | set_cam_ddr (I2C_PORT_DDR_READ_SDA); // SDA=1 SCL=0 |
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| | 308 | set_cam_ddr_i2c_idle (); // SDA=1 SCL=1 |
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| | 309 | } |
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| | 310 | else { |
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| | 311 | set_cam_ddr_i2c_write (); // SDA=0 SCL=0 |
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| | 312 | set_cam_ddr (I2C_PORT_DDR_READ_SCL); // SDA=0 SCL=1 |
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| | 313 | |
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| | 314 | } |
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| | 315 | while (!(REG (GPIO_IOPIN) & 0x00400000)); |
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| | 316 | // while(!I2C_SCL); |
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| | 317 | |
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| | 318 | |
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| | 319 | if (data & 0x08) { |
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| | 320 | set_cam_ddr (I2C_PORT_DDR_READ_SDA); // SDA=1 SCL=0 |
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| | 321 | |
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| | 322 | } |
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| | 323 | else { |
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| | 324 | set_cam_ddr_i2c_write (); // SDA=0 SCL=0 |
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| | 325 | } |
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| | 326 | |
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| | 327 | data <<= 1; |
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| | 328 | } // END OF 8 BIT FOR LOOP |
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| | 329 | |
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| | 330 | // Check ACK <************************************* |
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| | 331 | set_cam_ddr (I2C_PORT_DDR_READ_SDA); // SDA=1 SCL=0 |
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| | 332 | |
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| | 333 | set_cam_ddr_i2c_idle (); // SDA=1 SCL=1 |
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| | 334 | ack = 0; |
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| | 335 | |
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| | 336 | // if(I2C_SDA) // sample SDA |
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| | 337 | if (REG (GPIO_IOPIN) & 0x00800000) { |
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| | 338 | ack |= 1; |
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| | 339 | break; |
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| | 340 | } |
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| | 341 | |
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| | 342 | set_cam_ddr_i2c_write (); // SDA=0 SCL=0 |
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| | 343 | |
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| | 344 | } |
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| | 345 | |
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| | 346 | // Send Stop Bit |
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| | 347 | set_cam_ddr (I2C_PORT_DDR_READ_SCL); // SDA=0 SCL=1 |
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| | 348 | set_cam_ddr_i2c_idle (); // SDA=1 SCL=1 |
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| | 349 | |
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| | 350 | return ack; |
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| | 351 | |
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| | 352 | } |
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